Magillem provides to customers in the electronic industry tools and services that drastically reduce the global cost of complex design.
Magillem has developed an easy to use, state of the art platform solution to cover electronic systems design flow challenges in a context where complexity, interoperability and design re-use are becoming critical issues to manage design cycle time of SOC. Main benefits include:
- Maximizing Design and IP Re-use
- Using a virtual platform to configure their system and IPs
- Controlling the Design Flow
- Exploring their Design Flow architecture and optimizing it
- Improving their independence from CAD tools vendors
- Improving interoperability, communication
- Benefiting from better user interfaces to raise productivity
- Relying on worldwide adopted standards
Methodology tools should adapt to the trends in SoC design and help streamline the design flows without disrupting existing processes
The goal of this first step is to package all the components of an IP library into XML files in accordance with the IP-XACT schema (standarized as IEEE1685), which describes the syntax and semantic rules for the description of three kinds of elements: the bus definitions, the components and the designs (in which components are instantiated). Thus the purpose of the IP packaging is to fill in for each component the XML fields that describe its attributes: physical ports, interfaces, parameters, generics, register map, physical attributes, etc. An important part of the schema is dedicated to referencing the files related to the different views of a component: a view may be for instance a simulable model in a specific language (VHDL, Verilog, SystemC, etc) or documentation files (e.g. PDF, HTML, Framemaker). This work facilitates future reuse of existing components, because all of their features are easily accessible for its integration and configuration in a bigger system, as it will be explained in the next step.