Plastic Chip Encapsulation is a molding process where chips are being capsulated with Epoxy Molding Compound (EMC) to prevent physical damage or corrosion. This process contains the interconnection between microchips and other electronics (so-called wire bonding), curing phenomenon of thermoset material, and various control management of process conditions. Due to the complexity of multiple material components, such as EMC, chip, or leadframe, and high wire density, many challenges and uncertainty have been brought to the Chip Encapsulation process. Common defects include incomplete fill, welding lines, air traps, voids, wire sweep, paddle shift, package warpage, etc.
- Parametric modeling capability enables users to build high-quality models
- Visualize filling and curing processes and predict potential molding defects
- Optimize gate and runner designs and reduce cycle time
- Visualize wire sweep and prevent wire crossing problems, such as short circuit or broken wires
- Predict paddle deflection caused by pressure drop during the mold filling process
- Predict warpage in consideration of the correlation among IC components, resins, and their properties
Moldex3D IC Packaging provides a complete series of molding solutions that help engineers to simulate the complex chip encapsulation process, validate mold design, and optimize process conditions.
Melt front result in mold is 45% filled
In Wire Sweep Analysis, deformed wires are compared with original wires based on the wire sweep index